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Iranian Journal of Electrical and Electronic Engineering، جلد ۱۵، شماره ۳، صفحات ۳۱۰-۳۲۰
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عنوان انگلیسی A Design Methodology for Reliable MRF-Based Logic Gates
چکیده انگلیسی مقاله Probabilistic-based methods have been used for designing noise tolerant circuits recently. In these methods, however, there is not any reliability mechanism that is essential for nanometer digital VLSI circuits. In this paper, we propose a novel method for designing reliable probabilistic-based logic gates. The advantage of the proposed method in comparison with previous probabilistic-based methods is its ultra-high reliability. The proposed method benefits from Markov random field (MRF) as a probabilistic framework and triple modular redundancy (TMR) as a reliability mechanism. A NAND gate is used to show the design methodology. The simulation results verify the noise immunity of the proposed MRF-based gate in the presence of noise. In addition, the values from reliability estimation program show the reliability of 0.99999999 and 0.99941316 for transistor failure rates of 0.0001 and 0.001, respectively, which are much better as compared with previous reported MRF-based designs.
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نویسندگان مقاله | S. M. Razavi
Faculty of Electrical and Computer Engineering, University of Birjand, Birjand, Iran.


| S. M. Razavi
Faculty of Electrical and Computer Engineering, University of Birjand, Birjand, Iran.
نشانی اینترنتی http://ijeee.iust.ac.ir/browse.php?a_code=A-10-2850-1&slc_lang=en&sid=1
فایل مقاله اشکال در دسترسی به فایل - ./files/site1/rds_journals/446/article-446-1574393.pdf
کد مقاله (doi)
زبان مقاله منتشر شده en
موضوعات مقاله منتشر شده 2-VLSI
نوع مقاله منتشر شده Research Paper
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