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Iranian Journal of Electrical and Electronic Engineering، جلد ۱۷، شماره ۴، صفحات ۲۰۱۱-۲۰۱۱
عنوان فارسی
چکیده فارسی مقاله
کلیدواژه‌های فارسی مقاله
عنوان انگلیسی FPGA’s Dual-Port ROM-Based 8x8 Multiplier for Area Optimized Implementation of DSP Systems
چکیده انگلیسی مقاله FPGA's block memory may be programmed as a single or dual-port RAM/ROM module that leads to an area-efficient implementation of memory-based systems. In this contest, various works of carrying out an optimized implementation of simple to complex DSP systems on embedded building blocks may be seen. The multiplier is a core element of the DSP systems, and in implementing a memory-based multiplier, it is observed that one of the operands is kept constant, hence leading the design to a constant-coefficient multiplication. This paper shows Virtex-7 FPGA's dual-port ROM-based implementation of an 8x8 variable-coefficient multiplier that may be used in several simple to complex DSP applications. The novelty of the proposed design is to configure the block ROM in dual-port mode and, hence, get four partial products in two clock cycles and introduce two unconventional adder approaches for partial product addition. This approach leads to fully resource utilization and the provision of a variable-coefficient multiplier. The work also shows the comparison of proposed architecture with already existing memory-based implementations and concludes the work as a novel step towards the efficient memory-based implementation of multiplier core.
کلیدواژه‌های انگلیسی مقاله Block Memory,Digital Signal Processing,FPGA,Multiplier
نویسندگان مقاله | A. Pathan
School of Information Technology and Engineering, Melbourne Institute of Technology, Melbourne, Australia.


| T. Memon
School of Information Technology and Engineering, Melbourne Institute of Technology, Melbourne, Australia and Department of Electronic Engineering, Mehran University of Engineering and Technology, Jamshoro, Pakistan.
نشانی اینترنتی http://ijeee.iust.ac.ir/browse.php?a_code=A-10-3621-1&slc_lang=en&sid=1
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کد مقاله (doi)
زبان مقاله منتشر شده en
موضوعات مقاله منتشر شده 2-VLSI
نوع مقاله منتشر شده Research Paper
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